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ks86c6308/p6308 pro duct overview 1- 1 1 product overview sam88rcri product family samsung's sam88rcri family of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. a dual address/data bus architecture and a large number of bit- or nibble-configurable i/o ports provide a flexible programming environment for applications with varied memory and i/o requirements. timer/counters with selectable operating modes are included to support real-time operations. many sam88rcri microcontrollers have an external interface that provides access to external memory and other peripheral devices. ks86c6308/p6308 microcontroller the ks86c6308/p6308 single-chip 8-bit microcontroller is fabricated using an advanced cmos process. it is built around the powerful sam88rcri cpu core. stop and idle power-down modes were implemented to reduce power consumption. to increase on-chip register space, the size of the internal register file was logically expanded. the ks86c6308 has 8 k bytes of program memory on-chip. using the sam88rcri design approach, the following peripherals were integrated with the sam88rcri core: ? five co nfigurable i/o ports (32 pins) ? 20 bit-programmable pins for external interrupts ? 8-bit timer/counter and 16-bit timwe/counter with three operating modes ? full speed low speed usb function the ks86c6308/p6308 is a versatile microcontroller that can be used in a wide range of full/low speed usb support general purpose applications. it is especially suitable for use as a keyboard with hub controller and is available in a 64 -pin sdip and a 64-pin qfp package. otp the ks86c6308 microcontroller is also available in otp (one time programmable) version, KS86P6308. KS86P6308 microcontroller has an on-chip 8-kbyte one-time-programmable eprom instead of masked rom. the KS86P6308 is comparable to ks86c6308, both in function and in pin configuration.
product overview ks 86c6308/p6308 (preliminary spec) 1- 2 features cpu ? sam88rcri cpu core memory ? 8-kb internal program memory(rom) ? 256-byte internal register file (160-byte:general purpose) instruction set ? 41 instructions ? idle and stop inst ructions added for power- down modes instruction execution time ? 332ns at 12 mhz f osc interrupts ? 32 interrupt sources with one vector, each source has its pending bits ? one level, one vector interrupt structure oscillation frequency ? 12 mhz crystal/ceramic oscillator ? external clock source general i/o ? bit programmable five i/o ports (30 pins total) timer a ? one 8-bit basic timer for watchdog function and programmable oscillation stabilization programmable 8-bit timer internal generation function interval, capture, pwm mode match/capture overflow interrupt timer b ? programmable 16-bit timer interval generation function interval, capture, pwm mode match/capture overflow interrupt universal serial bus with hub ? 1 upstream port ? 4 downstream port and one embedded function each port supports separated enable led built- in 3.3 v voltage regulator usb/gpio function ? upstream port operation temperature range ? - 40 c to + 85 c operation voltage range ? 4.0 v to 5.5 v package types ? 64-pin sdip ? 64-pin qfp
ks86c6308/p6308 (preliminary spec) product overview 1- 3 block diagram 48 mhz pll lpf 12 mhz 12 mhz osc x i xo sam88rcri core lvd 8k rom 160 byte ram timer a (8 bit) timer b (16 bit) basic timer 8 b i t b u s usb transceiver & voltage regulator usb module usb device control pwren1 pwren2 pwren3 pwren4 ganged port p1.0 - p1.7 p0.0/int2 - p0.7/int2 p2.0/int0 - p2.7/int0 p4.0/int1 p4.1/int1 dp0/gpio, dm0/gpio dp1, dm1 dp2, dm2 dp3, dm3 dp4, dm4 3.3 v out ocdet1 ocdet2 ocdet3 ocdet4 ledon0 ledon1 ledon2 ledon3 v dd v ss v ss1 test reset tmod p3.3/taclk/clo p3.2/tbclk/usb_clk p3.1/tbcap/taout p3.1/tacap/tbout port port port port ledon4 figure 1-1. block diagram
product overview ks 86c6308/p6308 (preliminary spec) 1- 4 pin assignments ks86c6308/p6308 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 ledon4 p1.4 p1.5 p1.6 p1.7 p4.0/int1 p4.1/int1 p2.0/int0 p2.1/int0 p2.2/int0 p2.3/int0 p2.4/int0 p2.5/int0 sdat /p2.6/int0 sclk /p2.7/int0 v dd /v dd v ss /v ss xo /xo xi /xi test /test lpf v ss /v ssa reset /reset tmode dp0/gpio dm0/gpio dp1 dm1 dp2 dm2 dp3 dm3 ledon3 ledpn2 ledon1 ledon0 ocdet4 pwren4 p1.3 p1.2 p1.1 p1.0 p0.7/int2 p0.6/int2 p0.5/int2 p0.4/int2 p0.3/int2 p0.2/int2 p0.1/int2 p0.0/int2 ocdet3 pwren 3 p3.3/taclk/clo p3.2/tbclk/usb_clk p3.1/tbcap/taout p3.0/tacap/tbout v ss1 / v ss ocdet2 pwren2 ecdet1 pwren1 3.3v out dm4 dp4 figure 1-2. pin assignment diagram (64-pin sdip package)
ks86c6308/p6308 (preliminary spec) product overview 1- 5 p2.0/int0 p2.1/int0 p2.2/int0 p2.3/int0 p2.4/int0 p2.5/int0 sdat /p2.6/int0 sclk /p2.7/int0 v dd /v dd v ss /v ss xo /xo xi /xi test /test lpf v ss /v ssa reset /reset tmode dp0/gpio dm0/gpio p41/int1 p40/int1 p17 p16 p15 p14 ledon4 ledon3 ledon2 ledon1 ledon0 ocdet4 pwren4 dp1 dm1 dp2 dm2 dp3 dm3 dp4 dm4 3.3v out pwren1 ocdet1 pwren2 ocdet2 ks86c6308 (KS86P6308) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 p1.3 p1.2 p1.1 p1.0 p0.7/int2 p0.6/int2 p0.5/int2 p0.4/int2 p0.3/int2 p0.2/int2 p0.1/int2 p0.0/int2 ocdet3 pwren3 p3.3/taclk/clo p3.2/tbclk/usb_clk p3.1/tbcap/taout p3.0/tacap/tbout ganged 51 50 43 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 figure 1-3. pin assignment diagram (64-pin qfp package)
product overview ks 86c6308/p6308 (preliminary spec) 1- 6 pin descriptions table 1-1. ks86c6308/p6308 pin descriptions pin names i/o pin description pin type share pins p0.0-p0.7 i/o bit-programmable i/o port for schmitt trigger input or open-drain output. port 0 can be individually configured as external interrupt inputs. pull-up resistors are assignable by software. b int2 p1.0-p1.7 i/o bit-programmable i/o port for schmitt trigger input or open-drain output. pull-up resistors are assignable by software. b ? p2.0-p2.7 i/o bit-programmable i/o port for schmitt trigger input or open-drain output. port 2 can also be individually configured as external interrupt inputs. pull-up resistors are assignable by software. b int0 p3.0-p3.3 i/o bit-programmable i/o port for schmitt trigger input, open- drain output or push-pull output. port 3 are designed for to drive led directly. p3.3 can be used to system clock output(clo) pin. p3.2 pll clock out for pll block. c p3.3/taclk/clo p3.2/tbclk/ usb_clk p3.1/tbcap/taout p3.0/tacap/tbout p4.0-p4.1 i/o bit-programmable i/o port for schmitt trigger input or open-drain output or push-pull output. port4 can also be individually configured as external interrupt inputs. in output mode, pull-up resistors are assignable by software. but in input mode, pull-up resistors are fixed. d int1 3.3 v out ? 3.3 v output from internal voltage regulator ? ? x in x out ? system clock input and output pin (crystal/ceramic oscillator, or external clock source) ? ? int0 int1 int2 i external interrupt for bit-programmable port0, port2 and port4 pins when set to input mode. ? p2.0-p2.7 p4.0/p4.1 p0.0/p0.7 reset i reset signal input pin with lvd a ? lpf i low pass filter pin for pll ? ? test i test signal input pin (for factory use only; must be connected to v ss ) ? ? tmode i test signal input pin (for factory use only, must be connected to v ss ) ? ? v dd ? power input pin ? ? v ss v ss1 ? vss1 is a ground power for cpu core. vss2 is a ground power for i/o and osc block. ? ?
ks86c6308/p6308 (preliminary spec) product overview 1- 7 table 1-1. ks86c6308/p6308 pin descriptions (continued) pin names i/o pin description pin type share pins dp1, dm1 dp2, dm2 dp3, dm3 dp4, dm4 i/o these pins are an usb downstream pins. k ? dp0/gpio dm0/gpio i/o these pins are an usb upstream pin, programmable port for usb interface or general purpose i/o interface. ? ? ledon0 o root port led enable. n-channel open-drain output. = 0 turn led on. hub not suspend = 1 turn led off. reset, suspend, transfer in progress g ? ledon1-4 o four downstream port led enable. n-channel open- drain output. = 0 turn led on. port enable and hub not suspend = 1 turn led off. reset, suspend, transfer in progress g ? ocdet1-4 i four downstream power sense = 0 over current detected = 1 power okay f ? pwren1-4 o power on/off control signals. pwren1 - pwren4 are active low, n-ch open-drain outputs. in ganged mode, all output are swithed together. g ? ganged i gang or individual power control of downstream ports = 0 individual = 1 gang f ?
product overview ks 86c6308/p6308 (preliminary spec) 1- 8 pin circuit diagrams v dd pull-up resistor noise filter figure 1-4. pin circuit type a ( reset ) v dd pull-up resistor pull-up enable output disable v ss d0 mux d1 open data input data figure 1-5. pin circuit type b (port 0, 1, 2) output disable output data v dd v ss d0 mux d1 open drain input data figure 1-6. pin circuit type c (port 3) v dd pull-up resistor pull-up enable output disable output data v dd v ss d0 mux d1 open drain input data figure 1-7. pin circuit type d (port 4)
ks86c6308/p6308 (preliminary spec) product overview 1- 9 v dd pull-up resistor figure 1-8. pin circuit type f only on upstream ports dp x dm x r x d r x dp r x dm t x dp oen speed (only on downstream ports) t x dm only on downstream ports 3.0 v < v <3.6 v 15 k w 5 % or equivalent 15 k w 5 % figure 1-9. pin circuit type k
product overview ks 86c6308/p6308 (preliminary spec) 1- 10 output data figure 1-10. pin circuit type g
ks86c6308/p6308 (preliminary spec) product overview 1- 11 application citcuit dm1 ks86c6308 (p6308) xi xo lpf ganged v dd v dd dm0 v ss dp0 keyboard matrix dp2 upstream port v dd d- d+ v ss 12 mhz notes: 1. we recommand power switch, mic2525 (by micrel semiconductor). 2. r1: 1.5 k w r2: 15 k w 3. for proper operation of the pll, an external rc filter consisting of series rc network resistor and capacitor must be connected from the lpf pin to v ss . 4. port3 can use led direct drive. 5. upstream d+, d- can use gpio interface (see gpioconint) p2.0-p2.7 p0.0-p0.7 p1.0-p1.7 pwren1 pwren2 pwren3 pwren4 dp1 dm2 dp3 dm3 dm4 dp4 power switch v dd d- d+ v ss v dd d- d+ v ss v dd d- d+ v ss v dd d- d+ v ss downstream ports p3.2 p3.1 p3.0 ledon0 ledon1 ledon2 ledon4 ledon3 ocdet4 ocdet3 ocdet2 ocdet1 en oc in out dm1 figure 1-11. bus-powered, gang port (64-sdip, 64-qfp)
product overview ks 86c6308/p6308 (preliminary spec) 1- 12 dm1 ks86c6308 (p6308) xi xo lpf ganged v ss v dd dm0 v ss dp0 keyboard matrix dp2 upstream port v dd d- d+ v ss 12 mhz notes: 1. we recommand power switch, mic2525 (by micrel semiconductor). 2. for proper operation of the pll, an external rc filter consisting of series rc network resistor and capacitor must be connected from the lpf pin to v ss . 3. port3 can use led direct drive. 4. upstream d+, d- can use gpio interface (see gpioconint) p2.0-p2.7 p0.0-p0.7 p1.0-p1.7 dp1 dm2 dp3 dm3 dm4 dp4 power switching v dd d- d+ v ss v dd d- d+ v ss v dd d- d+ v ss v dd d- d+ v ss downstream ports p3.2 p3.1 p3.0 ledon0 ledon1 ledon2 ledon4 ledon3 pwren1 en oc in out ocdet1 pwren2 en oc in out ocdet2 pwren3 en oc in out ocdet3 pwren4 en oc in out ocdet4 dm1 figure 1-12. bus-powered, individual port (64-sdip, 64-qfp)
ks86c6308/p6408 ( preliminary spec) electrical data 12- 1 12 electrical data overview in this section, the following ks86c6308/p6308 electrical characteristics are presented in tables and graphs: ? absolute maximum ratings ? d.c. electrical characteristics ? input/output capacitance ? a.c. electrical characteristics ? input timing for external interrupt (ports 0, 2 and 4) dp0/gpio, dm0/gpio : gpio mode only ? input timing for reset ? oscillator characteristics ? oscillation stabilization time ? clock timing measurement points at x in ? data retention supply voltage in stop mode ? stop mode release timing when initiated by a reset ? stop mode release timing when initiated by an external interrupt ? characteristic curves
electrical data ks8 6c6308/p6408 ( preliminary spec) 12- 2 table 12-1. absolute maximum ratings (t a = 25 c ) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v in all input ports ? 0.3 to v dd + 0.3 v output voltage v o all output ports ? 0.3 to v dd + 0.3 v output current high i oh one i/o pin active ? 18 ma all i/o pins active ? 60 output current low i ol one i/o pin active + 30 ma total pin current for ports 0, 1, 2, 4 + 100 total pin current for port 3 + 100 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c
ks86c6308/p6408 ( preliminary spec) electrical data 12- 3 table 12-2. d.c. electrical characteristics (t a = ? 40 c to + 85 c , v dd = 4.0 v to 5.5 v) parameter symbol conditions min typ max unit operating voltage v dd f osc = 12 mhz 4.0 ? 5.5 v input high voltage v ih1 all input except v ih2 0.8 v dd ? v dd v v ih2 x in v dd ? 0.5 v dd input low voltage v il1 all input pins except v il2 ? ? 0.2 v dd v v il2 x in 0.4 output high voltage v oh i oh = ? 200 a; all output ports except ports 0, 1, 2, dp?s, dm?s v dd ? 1.0 ? ? v output low voltage v ol i ol = 1 ma all output ports except dp?s, dm?s ? ? 0.4 v input high leakage current i lih1 (4) v in = v dd all inputs excepts i lih2 , dp?s, dm?s ? ? 3 a i lih2 (4) v in = v dd x in, x out, reset ? ? 20 a input low leakage current i lil1 (4) v in = 0 v all inputs excepts i lil2 , dp?s, dm?s ? ? ? 3 a i lil2 (4) v in = 0 v x in, x out, reset ? ? ? 20 a
electrical data ks8 6c6308/p6408 ( preliminary spec) 12- 4 table 12-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c , v dd = 4.0 v to 5.5 v) parameter symbol conditions min typ max unit output high leakage current i loh (1) v out = v dd all i/o pins and output pins except dp?s and dm?s ? ? 3 a output low leakage current i lol (1) v out = 0 v all i/o pins and output pins except dp?s and dm?s ? ? ? 3 a pull-up resistors r l v in = 0 v ports 0, 1, 2, 4, reset 25 50 100 k w supply current i dd1 normal operation mode : 12 mhz crystal oscillator ? 30 ma i dd2 idle mode; 12 mhz crystal oscillator 15 i dd3 stop mode: oscillator stop 500 a notes : 1. except x in and x out . 2. supply current does not include through internal pull-up resistors or external output current loads. 3. figure 11-3 transition rise timer ( tr), fall timer ( tf) parameter is guaranteed, but not tested. 3. when usb mode only in 4.20 v to 5.25 v, dp?s and dp?s satisfy the usb specification version 1.0. table 12-3. input/output capacitance (t a = ? 40 c to + 85 c , v dd = 0 v) parameter symbol conditions min typ max unit input capacitance c in f = 1 mhz; unmeasured pins are connected to v ss ? ? 10 pf output capacitance c out i/o capacitance c io table 12-4. a.c. electrical characteristics (t a = ? 40 c to + 85 c , v dd = 4.0 v to 5.5 v) parameter symbol conditions min typ max unit interrupt input high, low width t inth , t intl p0, p2 and p4 ? 200 ? ns reset input low width t rsl reset ? 1000 ?
ks86c6308/p6408 ( preliminary spec) electrical data 12- 5 t inth t intl 0.8 v dd 0.2 v dd figure 12-1. input timing measurement points (ports 0, 2, and 4) reset t rsl 0.5 v dd figure 12-2. input timing for reset 90% 90% dp dm 10% 10% 0.5v dd t r t f figure 12-3. usb data signal timing
electrical data ks8 6c6308/p6408 ( preliminary spec) 12- 6 table 12-5. dpx, dmx driver characteristics, full speed operation symbol parameter condition min max unit t r rise time c l = 50pf 4 20 ns t f fall time c l = 50pf 4 20 ns t rfm t r /t f matching ? 90 11 % table 12-6. dpx, dmx driver characteristics, low speed operation symbol parameter condition min max unit t r rise time c l = 200-600pf 75 300 ns t f fall time c l = 200-600pf 75 300 ns t rfm t r /t f matching ? 80 125 %
ks86c6308/p6408 ( preliminary spec) electrical data 12- 7 r s t x d+ c l r s t x d- c l c l = 50 pf figure 12-4. full-speed load r s t x d+ c l r s t x d- c l = 200 pf to 600 pf c l 3.6 v figure 12-5. low-speed load
electrical data ks8 6c6308/p6408 ( preliminary spec) 12- 8 table 12-7. oscillator characteristics (t a = ? 40 c + 85 c ) oscillator circuit condition min typ max unit main crystal main ceramic (f osc ) c2 x in x out c1 v dd = 4.0v to 5.5v ? 12 ? mhz external clock x in x out v dd = 4.0v to 5.5v ? 12 ? table 12-8. oscillation stabilization time (t a = ? 40 c + 85 c , v dd = 4.0 v to 5.5 v) oscillator symbol condition min typ max unit crystal ? v dd = 4.0v to 5.5v ? ? 20 ms ceramic ? ? ? 10 external ? xin input high & low level width 25 ? 500 ns note : the oscillator stabilization wait time, t wait , is determined by the setting in the basic timer control register, btcon. table 12-9. data retention supply voltage in stop mode (t a = ? 40 c to + 85 c ) parameter symbol conditions min typ max unit data retention supply voltage v dddr stop mode 2.0 ? 6 v data retention supply current i dddr stop mode; v dddr = 2.0 v ? ? 500 ua
ks86c6308/p6408 ( preliminary spec) mechanical data 13- 1 13 mechanical data overview the ks86c6308/p6308 is available in a 64-pin sdip package ( samsung: 64-sdip-750) and a 64-pin qfp package (64 -qfp-1420f). package dimensions are shown in figures 13-1 and 13-2. note : dimensions are in millimeters. 0-15 #64 #33 #32 #1 17.00 0 .20 58.20 max 57.80 0 .20 0.45 0.10 1.00 0.10 1.778 0.51 min 3.30 0.30 4.10 0.20 5.08 max 19.05 (1.34) 64-sdip-750 0.25 + 0.10 - 0.05 figure 13-1. 64-pin sdip package mechanical data (64-sdip-750 )
mechanical data ks8 6c6308/p6408 ( preliminary spec) 13- 2 64-qfp-1420f #64 20.00 0.20 23.90 0.30 14.00 0.20 17.90 0.30 #1 1.00 (1.00) 0.40 + 0.10 - 0.05 note : dimensions are in millimeters. 0.80 0.20 0.10 max 0.15 + 0.10 - 0.05 0-8 0.80 0.20 0.05 min 2.65 0.10 3.00 max 0.15 max figure 13-2. 64-pin qfp package mechanical data (64-qfp-1420f )
ks86c6308/p6308 ( preliminary spec) KS86P6308 otp 14- 1 14 KS86P6308 otp overview the KS86P6308 single-chip cmos microcontroller is the otp (one time programmable) version of the ks86c6308 microcontroller. it has an on-chip otp rom instead of masked rom. the eprom is accessed by serial data format. the KS86P6308 is fully compatible with the ks86c6308, both in function and in pin configuration. because of its simple programming requirements, the KS86P6308 is ideal for use as an evaluation chip for the ks86c6308.
KS86P6308 otp ks86c6308/p6308 ( preliminary spec) 14- 2 KS86P6308 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 ledon4 p1.4 p1.5 p1.6 p1.7 p4.0/int1 p4.1/int1 p2.0/int0 p2.1/int0 p2.2/int0 p2.3/int0 p2.4/int0 p2.5/int0 sdat /p2.6/int0 sclk /p2.7/int0 v dd /v dd v ss /v ss xo /xo xi /xi test /test lpf v ss /v ssa reset /reset tmode dp0/gpio dm0/gpio dp1 dm1 dp2 dm2 dp3 dm3 ledon3 ledpn2 ledon1 ledon0 ocdet4 pwren4 p1.3 p1.2 p1.1 p1.0 p0.7/int2 p0.6/int2 p0.5/int2 p0.4/int2 p0.3/int2 p0.2/int2 p0.1/int2 p0.0/int2 ocdet3 pwren 3 p3.3/taclk/clo p3.2/tbclk/usb_clk p3.1/tbcap/taout p3.0/tacap/tbout ganged ocdet2 pwren2 ecdet1 pwren1 3.3v out dm4 dp4 figure 14-1. pin assignment diagram (64-pin sdip package)
ks86c6308/p6308 ( preliminary spec) KS86P6308 otp 14- 3 p2.0/int0 p2.1/int0 p2.2/int0 p2.3/int0 p2.4/int0 p2.5/int0 sdat /p2.6/int0 sclk /p2.7/int0 v dd /v dd v ss /v ss xo /xo xi /xi test /test lpf v ss /v ssa reset /reset tmode dp0/gpio dm0/gpio p41/int1 p40/int1 p17 p16 p15 p14 ledon4 ledon3 ledon2 ledon1 ledon0 ocdet4 pwren4 dp1 dm1 dp2 dm2 dp3 dm3 dp4 dm4 3.3v out pwren1 ocdet1 pwren2 ocdet2 KS86P6308 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 p1.3 p1.2 p1.1 p1.0 p0.7/int2 p0.6/int2 p0.5/int2 p0.4/int2 p0.3/int2 p0.2/int2 p0.1/int2 p0.0/int2 ocdet3 pwren3 p3.3/taclk/clo p3.2/tbclk/usb_clk p3.1/tbcap/taout p3.0/tacap/tbout ganged 51 50 43 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 figure 14-2. pin assignment diagram (64-pin qfp package)
KS86P6308 otp ks86c6308/p6308 ( preliminary spec) 14- 4 table 14-1. descriptions of pins used to read/write the eprom main chip during programming pin name pin name pin no. i/o function p2.6 sdat 9 (3) i/o serial data pin (output when reading, input when writing) input and push-pull output port can be assigned p2.7 sclk 10 (4) i/o serial clock pin (input only pin) test test 15 (9) i chip initialization and eprom cell writing power supply pin (indicates otp mode entering) when writing 12.5 v is applied and when reading. reset reset 18 (12) i 0 v: otp write and test mode 5 v: operating mode v dd / v ss v dd / v ss 11 (5) /12 (6) ? logic power supply pin. note: ( ) means 64 qfp package. table 14-2. comparison of KS86P6308 and ks86c308 features characteristic KS86P6308 ks86c6308 program memory 8-kbyte eprom 8-kbyte mask rom operating voltage (v dd ) 4.0 v to 5.25 v 4.0 v to 5.25 v otp programming mode v dd = 5 v, v pp (reset) = 12.5 v pin configuration 64 sdip/64 qfp 64 sdip/64 qfp eprom programmability user program 1 time programmed at the factory operating mode characteristics when 12.5 v is supplied to the vpp (reset) pin of the KS86P6308, the eprom programming mode is entered. the operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in table 14-3 below. table 14-3. operating mode selection criteria v dd vpp ( reset ) reg/ mem address (a15-a0) r/ w mode 5 v 5 v 0 0000h 1 eprom read 12.5 v 0 0000h 0 eprom program 12.5 v 0 0000h 1 eprom verify 12.5 v 1 0e3fh 0 eprom read protection note : "0" means low level; "1" means high level.
ks86c6308/p6308 ( preliminary spec) KS86P6308 otp 14- 5 start address= first location v dd =5v, v pp =12.5v x = 0 program one 1ms pulse increment x x = 10 verify 1 byte last address v dd = v pp = 5 v compare all byte device passed increment address verify byte device failed pass fail no fail yes fail no figure 14-3. otp programming algorithm
KS86P6308 otp ks86c6308/p6308 ( preliminary spec) 14- 6 table 14-4. d.c. electrical characteristics (t a = ? 40 _ c to + 85 _ c, v dd = 5.25 v) parameter symbol conditions min typ max unit supply current (note) i dd1 normal mode; 12 mhz crystal oscillator ? ? 30 ma i dd2 idle mode; 12 mhz cpu clock ? 15 i dd3 stop mode ? 500 a note : supply current does not include current drawn through internal pull-up resistors or external output current loads.

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